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An Analytical Model Proposed for Evaluating Efficiency of Partitioning Code in Hybrid Architectures Based on DSP and FPGA

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2 Author(s)
Sousa, E.R. ; Sch. of Electr. & Comput. Eng., State Univ. of Campinas - UNICAMP, Campinas, Brazil ; Meloni, L.

Recently, DSP and FPGA devices have been employed in cooperative computing architectures for embedded systems which has required high complexity computing process which in turn demanded efficient techniques capable of measuring the total effective gain of the partitioning of a given code. In order to meet that need and based on Amdahl's Law a mathematical model of analysis which takes into account various factors pertaining the decentralized processing between DSP and FPGA such as the involved communication mechanisms, processing capacity, complexity of algorithms, processor idle time, was proposed. A test scenario for the application of the proposed mathematical model which enables to assess the performance gain between the distributed and centralized processing models was also developed based on the motion estimation algorithm commonly used in many compression standards of digital images such as the H.264/AVC.

Published in:

High Performance Computing and Communications (HPCC), 2011 IEEE 13th International Conference on

Date of Conference:

2-4 Sept. 2011