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III-V Quantum Well Field Effect Transistors on Silicon for Future High Performance and Low Power Logic Applications

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3 Author(s)
Dewey, G. ; Components Res., Intel Corp., Hillsboro, OR, USA ; Radosavljevic, M. ; Mukherjee, N.

This work summarizes the advantages and challenges of III-V channel transistors for high performance and low power logic applications with respect to Si CMOS. The challenge of heterogeneous integration of III-V on Si is addressed by integration of In0.7Ga0.3As QWFETs on Si substrates with a total composite buffer thickness successfully scaled down to 1.3um. The main advantages are demonstrated with Schottky-Gate In0.7Ga0.3As QWFET on Si substrate showing 4.6X to 3.3X effective velocity gain over Si n-MOSFET for a VCC range of 0.5V to 1.0V, and 65% intrinsic drive current gain over Si nMOSFET at VCC = 0.5V. In addition, the challenge of further scaling and reduction of the high gate leakage that occurs in Schottky-gate devices is addressed by successful integration of an advanced composite high-K gate stack in the In0.7Ga0.3As QWFET.

Published in:

Compound Semiconductor Integrated Circuit Symposium (CSICS), 2011 IEEE

Date of Conference:

16-19 Oct. 2011