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Fast static RAM Level Two cache MCM with gold wire ball bumped flip chip assembly

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3 Author(s)
Higgins, L. ; Adv. Interconnect Syst. Lab., Motorola Inc., Austin, TX, USA ; Cole, R. ; Duane, D.

The electrical performance benefits afforded by the use of low interconnect parasitic Flip Chip packaging offers even greater system level benefit when used with Multichip Modules (MCM). The flip chip bumping and assembly cost must be minimized for high volume commodity products. An evaluation was undertaken to assess the cost, performance, and reliability of gold wire ball bump assembly for a Level Two cache memory module. The module was already in development with the more standard lead-tin solder based bumping and assembly, and it was desired to determine if gold ball bump bonding could offer any advantages. In this paper, the ball bumps are characterized and the flip chip plastic ball grid array (FC-PBGA) MCM assembly process is described. The test and reliability evaluation plan for the MCM is also discussed

Published in:

Electronic Components and Technology Conference, 1997. Proceedings., 47th

Date of Conference:

18-21 May 1997