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A 90nm data flow processor demonstrating fine grained DVS for energy efficient operation from 0.25V to 1.2V

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6 Author(s)
Shakhsheer, Y. ; Dept. of Electr. & Comput. Eng., Univ. of Virginia, Charlottesville, VA, USA ; Khanna, S. ; Craig, K. ; Arrabi, S.
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We present a 90nm data flow processor that executes DSP algorithms using fine grained DVS at the component level with rapid VDD switching and VDD dithering for near-ideal quadratic dynamic energy scaling from 0.25V-1.2V. Measurements show energy savings up to 50% and 46% compared to single-VDD and multi-VDD alternatives.

Published in:

Custom Integrated Circuits Conference (CICC), 2011 IEEE

Date of Conference:

19-21 Sept. 2011