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A highly linear, efficient power amplifier for high data rate wireless applications is presented. The linearity is greatly improved by adding an auxiliary amplifier to the main bipolar junction transistor (BJT) in a feed-forward approach to cancel out the non-linearity terms. The efficiency enhancement is achieved using a switchable biasing and output matching network based on the available input power which is monitored by an on chip envelope detector. The PA is fabricated in 0.25 μm BiCMOS technology. The experimental results show a gain of 13 dB and a maximum output power of 23 dBm with supply voltages of 2.5 V and 1.7 V at 2 GHz. The 1 dB output power compression point is 21 dBm with a 32% PAE. The IM3 and IM5 terms are 41 dB and 44 dB below the fundamental tone for the 21 dBm average output power.