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A Full-Range Drain Current Model for Double-Gate Junctionless Transistors

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3 Author(s)
Duarte, J.P. ; Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol. (KAIST), Daejeon, South Korea ; Sung-Jin Choi ; Choi, Yang-Kyu

A drain current model available for full-range operation is derived for long-channel double-gate junctionless transistors. Including dopant and mobile carrier charges, a continuous 1-D charge model is derived by extending the concept of parabolic potential approximation for the subthreshold and the linear regions. Based on the continuous charge model, the Pao-Sah integral is analytically carried out to obtain a continuous drain current model. The proposed model is appropriate for compact modeling, because it continuously captures the phenomenon of the bulk conduction mechanism in all regions of device operation, including the subthreshold, linear, and saturation regions. It is shown that the model is in complete agreement with the numerical simulations for crucial device parameters and all operational voltage ranges.

Published in:

Electron Devices, IEEE Transactions on  (Volume:58 ,  Issue: 12 )

Date of Publication:

Dec. 2011

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