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A memory efficient parallel lossless image compression engine for high performance embedded systems

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5 Author(s)
Zhe Wang ; Dept. of Parallel Syst., Univ. of Stuttgart, Stuttgart, Germany ; Michael, A.Y. ; Wahl, S. ; Werner, P.
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A parallel lossless image compression engine based on memory efficient tiling and context-based predictive coding is presented for high performance embedded systems. The engine compresses n pixels in parallel with n elementary processing units (EPUs). The low complexity of the JPEG-LS algorithm, combined with its competitive performance, is an advantage for embedded systems. Our algorithm driving the EPU further extends this advantage by memory-reduced context modeling and adjusted Golomb coding. The n parallel codeword streams are fed into a multiplexer tree for a single codeword stream, which is then fed into a buffer for fixed-length output. The compression performance of the proposed engine is closely comparable to the original JPEG-LS, while the pixel throughput is increased by a factor of 1.2n for n EPUs. Hardware implementation of a single EPU requires 25% less resources compared to the original JPEG-LS for the same pixel throughput.

Published in:

Image and Signal Processing and Analysis (ISPA), 2011 7th International Symposium on

Date of Conference:

4-6 Sept. 2011