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This paper introduces an Y-chart methodology for performance estimation based on high level models for both application and architecture. As embedded devices are more and more complex, the choice of the best suited architecture not only in terms of processing power but also in power consumption becomes a tedious task. In this context, estimation tools are key components in architecture choice methodology. Obtained results show an error margin of less than 13% of estimation performance for a H.264 video decoder application on two different hardware platforms.