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Design of a high performance FPGA based fault injector for real-time safety-critical systems

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3 Author(s)
Marko Miklo ; Charles L. Brown Dept. of Comput. Eng., Univ. of Virginia, Charlottesville, VA, USA ; Carl R. Elks ; Ronald D. Williams

Fault injection methods have long been used to assess fault tolerance and safety. However, many conventional fault injection methods face significant shortcomings, which hinder their ability to execute fault injections on target real-time safety-critical systems. We demonstrate a novel fault injection system implemented on a commercial Field-Programmable Gate Array board. The fault injector is unobtrusive to the target system as it utilizes only standardized On-Chip-Debugger (OCD) interfaces present on most current processors. This effort resulted in faults being injected orders of magnitude faster than by utilizing a commercial OCD debugger, while incorporating novel features such as concurrent injection of faults into distinct target processors. The effectiveness of this high performance fault injector was successfully demonstrated on a tightly synchronized commercial real-time safety-critical system used in nuclear power applications.

Published in:

ASAP 2011 - 22nd IEEE International Conference on Application-specific Systems, Architectures and Processors

Date of Conference:

11-14 Sept. 2011