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Low-cost hardware profiling of run-time and energy in FPGA embedded processors

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4 Author(s)
Aldham, M. ; ECE Dept., Univ. of Toronto, Toronto, ON, Canada ; Anderson, J. ; Brown, S. ; Canis, A.

This paper introduces a low-overhead hardware profiling architecture, called LEAP, that attains real-time cycle and energy profiles of an FPGA-based soft processor. A novel technique is used to associate profiling data with specific functions in a way that is area- and power-efficient. Results show that relative to a previously-published hardware profiler, our design uses up to 18× less area and 8.6× less energy. LEAP is designed to be extensible for a variety of profiling tasks, three of which are investigated in this paper. We also demonstrate the utility of LEAP in the context of hardware/software co-design of processor/accelerator FPGA-based systems.

Published in:

Application-Specific Systems, Architectures and Processors (ASAP), 2011 IEEE International Conference on

Date of Conference:

11-14 Sept. 2011