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iWISE: Inter-router Wireless Scalable Express Channels for Network-on-Chips (NoCs) Architecture

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4 Author(s)
DiTomaso, D. ; Sch. of Electr. Eng. & Comput. Sci., Ohio Univ., Athens, OH, USA ; Kodi, A. ; Kaya, S. ; Matolak, D.

Network-on-Chips (NoCs) paradigm is fast becoming a defacto standard for designing communication infrastructure for multicores with the dual goals of reducing power consumption while improving performance. However, research has shown that power consumption and wiring complexity will be two of the major constraints that will hinder the growth of future NoCs architecture. This has resulted in the investigation of emerging technologies and devices to alleviate the power and performance bottleneck in NoCs. In this paper, we propose iWISE, an inter-router wireless scalable express channels for NoCs architecture that minimizes the power consumption via hybrid wireless communication channels, reduces the area overhead with smaller routers and shared buffers, and improves performance by minimizing the hop count. We compared our network to leading electrical and wireless topologies such as mesh, concentrated mesh, flattened butterfly and other wireless hybrid topologies. Our simulation results on real applications such as Splash-2, PARSEC, and SPEC2006 for 64 core architectures indicate that we save 2X power and 2X area while improving performance significantly. We show that iWISE can be further scaled to 256 cores while achieving a 2.5X performance increase and saving of 2X power when compared to other wireless networks on synthetic workloads.

Published in:

High Performance Interconnects (HOTI), 2011 IEEE 19th Annual Symposium on

Date of Conference:

24-26 Aug. 2011