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A new solution to GNSS receiver baseband signal processing SoC platform based on OpenRISC CPU is presented. The system hardware structure of the SoC platform on Xilinx FPGA is built. The GNSS correlator which is implemented in Xilinx FPGA is presented. OpenRISC CPU and Wishbone are migrated and OpenRISC software functions are expounded. The proposed SoC platform is useful to design a low cost GNSS baseband ASIC chip with flexibility, openness and freeness.
Date of Conference: 23-25 Sept. 2011