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A 1.4-3.3 V 5 mA CMOS low-dropout (LDO) linear regulator with a high power supply rejection (PSR) over a large frequency range is presented. An improved circuit topology with a second loop and a replica technique has been implemented in 90 nm CMOS technology. Thanks to a highpass filter included in the replica loop, the mismatch effects between the feedback loops are cancelled and a high PSR is achieved. Complete analysis, design steps and simulation results are presented. The proposed LDO achieves a PSR better than 60 dB up to 100 MHz with a 47 nF output capacitor.