Skip to Main Content
To fully realize the benefits of rapid reconfiguration of embedded system, we often need a flexible interconnection system. This work proposes a low cost reconfigurable interconnection based on multistage interconnection networks (MINs) for FPGA systems. We show how radix 4 MINs can be efficiently implemented on top of 6 input LUTs. We also show that two parallel blocking MINs could behave as a non-blocking network even in presence of multicast connections. We further show how to route by using software or hardware-assistant approach. The hardware version has a low cost and a high performance. Consequently, route time can be reduced to few clock cycles. We further outline how a global interconnection based on MIN could be used for parallel datapath reconfigurable architectures.
Date of Conference: 26-29 July 2011