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M-PRES: a statistical tool for modelling the impact of manufacturing process variations on circuit-level performance parameters

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3 Author(s)
S. Shedabale ; Newcastle University, UK ; G. Russel ; L A. Yakovlev

The effects of process variations on the performance of nanometre CMOS circuits have become a serious design issue, aggravated by further scaling of device dimensions. This article presents a statistical TCAD tool called Multilevel-Partitioned REsponse Surface Modelling (M-PRES) to model the impact of manufacturing process variations on circuit performance; an SRAM cell is used as a demonstration vehicle for the tool. A new non-Gaussian approach for modelling variations for sub-90 nm technologies is also presented. A comparison is made with the Monte Carlo approach, demonstrating four times (4×) computationally efficiency for M-PRES without the loss of accuracy. The M-PRES models are also re-usable reducing the computation time for the analysis of other sets of process data down to a few tens of seconds.

Published in:

IET Circuits, Devices & Systems  (Volume:5 ,  Issue: 5 )