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A 6.75 mW + 12.45 dBm IIP3 1.76 dB NF 0.9 GHz CMOS LNA Employing Multiple Gated Transistors With Bulk-Bias Control

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2 Author(s)
Tae Hwan Jin ; School of Electrical & Electronic Eng., Yonsei University, Seoul, Korea ; Tae Wook Kim

This letter presents a gm''-cancellation range extension method with bulk-bias control that was applied to a Multiple Gated Transistors (MGTR) technique, which is a linearity enhancement technique for RF amplifiers. Instead of adjusting the gate-biasing voltage of the auxiliary transistor (AT) (Vshift) in conventional gm'' -cancellation, we propose to use the bulk-biasing voltage, VBS, which allows for range extension of the gm''-cancellation of AT. The proposed technique does not require any other additional biasing circuits and has the benefit of consuming less power. The proposed low noise amplifier (LNA) is implemented in 0.18 μm 1-poly-6-metal CMOS technology. Our results show that the LNA achieves a noise figure of 1.76 dB, a +12.45 dBm input third order intercept point (IIP3), and a 15 dB power gain at 0.9 GHz, with the core LNA consuming 4.5 mA from a 1.5 V power supply.

Published in:

IEEE Microwave and Wireless Components Letters  (Volume:21 ,  Issue: 11 )