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Efficient Logarithmic Converters for Digital Signal Processing Applications

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3 Author(s)
De Caro, D. ; Dept. of Electron. & Telecommun. Eng., Univ. of Napoli Federico II, Naples, Italy ; Petra, N. ; Strollo, A.G.M.

The hardware computation of the logarithm function is required in a multitude of applications. This brief investigates logarithmic converters based on piecewise linear approximations. This brief presents a rigorous technique, based on mixed-integer linear programming, to obtain optimal coefficients' values, which minimize the maximum relative approximation error while using a reduced number of nonzero bits for the coefficients. The proposed method results in a sensible reduction of the relative approximation error, as compared with previously published results. The hardware implementation realizes the multiplication by a few shifts and additions, avoiding the use of full multipliers. Implementation details and synthesis results in a 90-nm CMOS technology are also described in this brief.

Published in:

Circuits and Systems II: Express Briefs, IEEE Transactions on  (Volume:58 ,  Issue: 10 )

Date of Publication:

Oct. 2011

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