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The soft error rates of memories are increased by high-energy particles as technology shrinks. Single-error correction codes (SEC), scrubbing techniques, and interleaving distance (ID) schemes are the most common approaches for protecting memories from soft errors. It is essential to employ analytical models to guide the selection of the interleaving distance; relying on rough estimates may lead to unreasonable design choices. The analytical model proposed in this paper includes the row clustering effects of the accumulated upsets, and was able to estimate the failure probability with a difference of only 0.015% compared to the test data for a 45 nm static random access memory (SRAM) design.