Referenced Items are not available for this document.
As IC process geometries scale down to the nanometer era, the industry faces severe challenges of manufacturing limitations. For the imperfect manufacturing process, physical design for manufacturability has played an essential role in resolution and thus yield enhancement to guarantee yield. In this paper, we introduce three major challenges arising from the nanometer process technology and survey major existing techniques for handling the challenges in physical design for manufacturability.
Published in:
Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on
Date of Conference: 7-10 Aug. 2011
- Page(s):
- 1 - 4
- ISSN :
- 1548-3746
- E-ISBN :
- 978-1-61284-855-6
- Print ISBN:
- 978-1-61284-856-3
- INSPEC Accession Number:
- 12269676
- Conference Location :
- Seoul
- Digital Object Identifier :
- 10.1109/MWSCAS.2011.6026536
- Product Type:
- Conference Publications
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