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An ultra low voltage ultra high gain CMOS LNA using forward body biasing technique

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5 Author(s)
Kargaran, E. ; Microelectron. Lab., Sadjad Inst. of Higher Educ., Mashhad, Iran ; Nabovati, G. ; Baghbanmanesh, M.R. ; Mafinezhad, K.
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A fully integrated 1.5 GHz low noise amplifier suitable for ultra-low voltage applications is designed and simulated in a standard 0.18μm CMOS technology. Using the folded cascode topology and forward body biasing technique, the proposed LNA works at a very low supply voltage and low power consumption. The proposed LNA has a power gain (S21) of 22 dB with a noise figure of 1.9 dB, while consuming 2.5mW dc power with an ultra low supply voltage of 0.5 V.

Published in:

Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on

Date of Conference:

7-10 Aug. 2011