Close category search window
 

Accelerating finding euler circuit on CPU-GPGPU heterogeneous architecture

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Jiachun Ye ; Sch. of Comput. Eng. & Sci., Shanghai Univ., Shanghai, China ; Songnian Yu

GPU (Graphic Processing Unit) provides a large computational performance at a very low price. Algorithms with regular data access map well to the SIMD architecture of current GPU, while irregular algorithms on discrete data structures like graphs are hard to map. In this paper, we transform the prior algorithm, design special data structures, and present an optimized CPU-GPU implementation for finding Euler circuit on a randomly generated Eulerian graph. It can deal with a graph of 4096 vertices and 1.7 million edges in about 1 second, which has a speed up of about 50 times over the best sequential CPU implementation.

Published in:
Mechatronic Science, Electric Engineering and Computer (MEC), 2011 International Conference on

Date of Conference: 19-22 Aug. 2011

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.