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Adaptive body bias (ABB) and adaptive supply voltage (ASV) are effective methods for post-silicon tuning to reduce variability on generic combinational circuits or microprocessor circuit sub-blocks. We focus in this work on global point-to-point interconnects, which are evolving into complex communication channels with drivers and receivers, in an attempt to mitigate the effects of reverse scaling and reduce power. The characterisation of the performance spread of these links and the exploration of effective and power-aware compensation techniques for them is becoming a key design issue. This work compares the effectiveness of ABB against ASV when put at work on two on-chip point-to-point link architectures: a traditional full-swing and a low-swing signalling scheme for low-power communication. This work provides guidelines for the post-silicon variability compensation of these communication channels, while considering realistic layout effects. In particular, the implications of cross-coupling capacitance on the effectiveness of variability compensation are analysed in this work.