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The research of low-power design method based on SOC test controller

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3 Author(s)
Gu Jing ; Inst. of Comput. Sci. & Technol., Harbin Univ. of Sci. & Technol., Harbin, China ; Guibo Han ; Yu Xiaoyang

Considered from the test structure, test time, test power, the paper based on the IEEEstd1500 standards, the first reference in the test circuit is to build a structure of SOC testing, including test cases and test shell test controller., SOCd695 were completed by SOC test scheduling TAM through Optimization of neural network after simulation. In order to achieve optimal low-power SOC design of the tcu test control unit, use the adoption of innovative parity algorithm in descending order before test scheduling, to to reduce the testing of all nodes in the transition activities to reduce the power consumption of SOC test structure. Experimental results show that this method is better to reduce power consumption, lower the cost of test.

Published in:

Strategic Technology (IFOST), 2011 6th International Forum on  (Volume:2 )

Date of Conference:

22-24 Aug. 2011