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The capabilities of Wireless Sensor Network (WSN) are unveiling with each passing day. Extensive use of WSNs is giving rise to different types of threats. To defend against the threats proper security schemes are required. Limited area, power and memory of WSNs implement strict constraints on the selection of cryptographic techniques. Elliptic Curve Cryptography (ECC) is the best candidate due to its smaller key size. High security despite of smaller key size results in area and power efficient crypto systems. This paper describes the hardware implementation of Elliptic Curve based asymmetric cryptosystem for wireless sensor networks. The field used for elliptic curve is defined over prime number. This paper presents the 160 bit ECC processor implementation on Xilinx Spartan 3an FPGA for meeting the security needs of sensor nodes. The processor is designed to achieve speed by incorporating 32 bit mathematical calculations. The design also provides excellent area results.