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Using Application Benchmark Results from TI-10 to Find Appropriate HPCMP Architectures

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5 Author(s)
Laura Brown ; Eng. R&D Center, Comput. Sci. & Eng. Group, US Army, Vicksburg, MS, USA ; Paul M. Bennett ; Mark Cowan ; Carrie Leach
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Time-to-solution and scalability of an application can vary greatly from one computer architecture to another. It is important then to consider the appropriateness of architectures with respect to applications to make the most efficient use of available resources. However, because of the wide range of applications currently in use within the community and the large number of systems managed by the High Performance Computing Modernization Program (HPCMP), determining the most appropriate systems for each application can be difficult. This paper, therefore, focuses solely on codes within the HPCMP Technology Insertion 2010 (TI-10) Applications Benchmarking Suite. These codes include AMR, AVUS, CTH, GAMESS, HYCOM, ICEPIC, and LAMMPS. This paper evaluates the parallel performance per processor of each of the seven TI-10 codes on current HPCMP architectures and determines the architectures on which each application runs most efficiently. This, along with added analysis of application and system features, can be helpful in guiding users and developers in selecting appropriate architectures for their codes.

Published in:

High Performance Computing Modernization Program Users Group Conference (HPCMP-UGC), 2010 DoD

Date of Conference:

14-17 June 2010