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The dynamically reconfigurable computer is a novel type of computers. Test control&communication of hierarchical Design-For-Testability for testing dynamically reconfigurable computer is presented in this paper. It can be used to detect both faults in the circuits of test targets and the test controller itself. Using this method, the fault in the test target can be detected in time, and the test result can be reported to the user immediately. Adopting hierarchical Design-For-Testability technique, the safety and stability of the system are enhanced, and the test result becomes more dependable.
Intelligent Control and Information Processing (ICICIP), 2011 2nd International Conference on (Volume:1 )
Date of Conference: 25-28 July 2011