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This paper presents a dual-feedback continuous-time delta-sigma modulator that features a signal transfer function with low sensitivity to coefficient variations. The anti-aliasing of this topology is similar to that of the feedback architecture while using only two feedback paths for modulators of any order. The proposed architecture is a good candidate for low-power applications as it shows relaxed amplifier gain-bandwidth requirements for the first integrator. As a proof of concept, a third-order delta-sigma modulator has been implemented and tested which achieves 76 dB dynamic range over 5 MHz signal bandwidth while consuming 6 mW from a 1.2 V supply. The prototype chip, fabricated in a 130 nm CMOS process, provides 70 dB anti-aliasing with no out-of-band peaking in the signal transfer function.