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A High-Density MTP Cell With Contact Coupling Gates by Pure CMOS Logic Process

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5 Author(s)
Haw-Yun Wu ; Microelectron. Lab., Nat. Tsing Hua Univ., Hsinchu, Taiwan ; Cheng-Wei Tsai ; Chiu-Wang Lien ; Chih, Y.-D.
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In this letter, we propose a new fully logic-process-compatible multitime programmable (MTP) memory cell for high-density logic nonvolatile memory (NVM) applications. A very small logic NVM MTP cell has been demonstrated on pure 0.18-μm CMOS process and logic design rules without extra masking and process steps. The MTP cell can be efficiently programmed and erased with a novel tiny contact coupling structure. Very small cell size, fast programming speed, and superior reliability characteristic make the new contact coupling gate MTP cell be one of the most promising solutions in advanced logic NVM application.

Published in:

Electron Device Letters, IEEE  (Volume:32 ,  Issue: 10 )