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We present new experimental results on heavy ion-induced gate rupture on deep submicron CMOS transistor arrays. Through the use of dedicated test structures, composed by a large number of 130-nm MOSFETs connected in parallel, we show the response to heavy ion irradiation under high stress voltages of devices previously irradiated with X-rays. We found only a slight impact on gate rupture critical voltage at a LET of 32 MeV cm2 mg-1 for devices previously irradiated up to 3 Mrad(SiO2), and practically no change for 100 Mrad(SiO2) irradiation, dose of interest for the future Super Large Hadron Collider (SLHC). We attribute this effect to the interplay between the damages produced by X rays, heavy ions, and electrical stress.