By Topic

Implementation of QRD-RLS algorithm on FPGA. Application to Noise Canceller System

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Martinez, M.E.I. ; Centro de Desarrollo de la Electron. y la Autom. (CDEA), Pinar del Rio, Cuba

This article describes one of the many applications of adaptive filtering algorithms, in this case the noise reduction or cancellation in particular using the QRD-RLS algorithm, conducting its implementation on FPGA and taking as the cornerstone of the work, the flexibility of these devices and the advantages of hardware acceleration algorithms in certain applications.

Published in:

Latin America Transactions, IEEE (Revista IEEE America Latina)  (Volume:9 ,  Issue: 4 )