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Embedded SiGe source/drain and temperature degrading junction performance on <110> 45 nm MOSFETs

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6 Author(s)
Mu-Chun Wang ; Grad. Inst. of Mechatron. Eng., Nat. Taipei Univ. of Technol., Taipei, Taiwan ; Long-Sian Lin ; Heng-Sheng Huang ; Wen-Shiang Liao
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Embedded SiGe process technology in source/drain is an available method to do the compressive strain in PMOSFETs to increase the channel mobility. However, the fringe junction leakage close to gate electrodes, comparing that with the control group, is increased more. When the temperature effect is incorporated, this deterioration is more obvious. Through the decouple technology with feasible junction pattern design, the fringe junction leakage issue can be effectively extracted and clarified.

Published in:

Nanoelectronics Conference (INEC), 2011 IEEE 4th International

Date of Conference:

21-24 June 2011