By Topic

Electrical characterization of silicon nanowire p-i-n diodes arrays with varying diameters

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Yongshun Sun ; Institute of Microelectronics, A∗STAR (Agency for Science, Technology and Research), 11 Science Park Road, Singapore Science Park II, Singapore 117685 ; Mingbin Yu ; Rusli

Silicon based p-i-n diodes arrays with varying diameters were fabricated on SOI wafer using CMOS compatible top-down approach. Each array comprises 500 identical Si nanowires (SiNWs) in parallel. Different exposure dose was used for different arrays to define silicon fins with varying widths. The fins were subsequently oxidized to form SiNWs with different diameters. Strong rectifying characteristics were observed. It was also noted that ideality factor increases from 1.09 to 1.95 as SiNW diameter decreases, which is due to the increase surface recombination sites as a result of larger surface area to volume ratio.

Published in:

Nanoelectronics Conference (INEC), 2011 IEEE 4th International

Date of Conference:

21-24 June 2011