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A 210 nW 29.3 ppm/°C 0.7 V voltage reference with a temperature range of −50 to 130 °C in 0.13 µm CMOS

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2 Author(s)
Junghyup Lee ; Dept. of EE, KAIST, Daejeon, South Korea ; SeongHwan Cho

A low-voltage, low-power CMOS voltage reference with high temperature stability in a wide temperature range is presented. The temperature dependence of mobility and oxide capacitance is removed by employing transistors in saturation and triode regions and the temperature dependence of threshold voltage is removed by exploiting the transistors in weak inversion region. Implemented in 0.13 um CMOS, the proposed voltage reference achieves temperature coefficient of 29.3 ppm/°C against temperature variation of -50 - 130°C and line sensitivity of 337 ppm/V against supply variation of 0.7-1.8 V, while consuming 210 nW from 0.7V supply and occupying 0.023 mm2.

Published in:

VLSI Circuits (VLSIC), 2011 Symposium on

Date of Conference:

15-17 June 2011

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