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Memory-memory-memory Clos-network packet switches with in-sequence service

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3 Author(s)
Ziqian Dong ; Dept. of Electr. & Comput. Eng., New York Inst. of Technol., New York, NY, USA ; Rojas-Cessa, R. ; Oki, E.

Out-of-sequence is a problem faced by multi-stage buffered Clos-network switches. This paper proposes two buffered three-stage Clos-network packet switches that service packets in sequence and provide high switching performance. The proposed switches require short configuration times as compared to existing bufferless or partially buffered Clos-network switches. The proposed switches use time stamps assigned at the input modules to identify the order of packets in the switch. The switches use time-stamp monitoring mechanisms either at the input modules in a switch called the MMM-IM switch, or at the output modules in a switch called the MMM-OM switch to keep packets in sequence. Synchronization among different switch modules is not required in the proposed switches. The switching performance study presented in this paper shows that in-sequence monitoring at the IM provides higher performance and larger scalability than in-sequence monitoring at the output. Furthermore, the throughput of the MMM-IM switch is comparable to that of a switch that may service packets out of sequence.

Published in:

High Performance Switching and Routing (HPSR), 2011 IEEE 12th International Conference on

Date of Conference:

4-6 July 2011