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SRAM read current tail distribution beyond 6s was studied using Voltage Acceleration Method (VAM). For the first time, non-Gaussian distribution of SRAM and ROM read current was confirmed with direct measurements on actual silicon. Data shows that conventional assumption of Gaussian distribution in read current is inaccurate especially at low Vdd and cold temperature conditions for low power memory in 28nm and beyond technology nodes. In 28nm, this inaccuracy would lead to 2× bit access delay penalty.