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A high-parallelism distributed scheduling mechanism for multi-core instruction-set simulation

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4 Author(s)
Meng-Huan Wu ; Nat. Tsing Hua Univ., Hsinchu, Taiwan ; Peng-Chih Wang ; Cheng-Yang Fu ; Ren-Song Tsay

Ideally, multi-core instruction-set simulation should run in parallel to improve simulation performance. However, the conventional low-parallelism centralized scheduler greatly constrains simulation performance. To resolve this issue, we propose a high-parallelism distributed scheduling mechanism. The experimental results show that our proposed approach accelerates simulation by 6 to 20 times, depending on the number of cores.

Published in:

Design Automation Conference (DAC), 2011 48th ACM/EDAC/IEEE

Date of Conference:

5-9 June 2011