By Topic

Implementation and evaluation of FAST corner detection on the massively parallel embedded processor MX-G

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

6 Author(s)
Yushi Moko ; University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo, Japan ; Takashi Komuro ; Masami Nakajima ; Yoshihiro Watanabe
more authors

We implemented and evaluated the FAST corner detection algorithm on the MX-G, a system LSI device with a matrix-type massively parallel processor ”MX core” developed by Renesas Electronics Corp. FAST corner detection is a very efficient feature detection algorithm. We developed a method to parallelize the FAST algorithm by using both the MX core and the SH-2A host CPU effectively. Our implementation achieved about five times faster performance than an implementation using only the host CPU. Experimental results show that the parallel FAST algorithm can detect corners from 512×512 monochrome images at video rates on an embedded processor.

Published in:


Date of Conference:

20-25 June 2011