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Re2DA: Reliable and reconfigurable dynamic architecture

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3 Author(s)
Hung-Manh Pham ; IRISA, Univ. of Rennes I, Lannion, France ; Devaux, L. ; Pillement, Sebastien

Exploiting partial reconfiguration of commercial FPGAs allows the construction of dynamic multi-processor system-on-chip (MPSoC). This solution offers many advantages such as: low development costs and maintains flexibility as well as high computation power. However, FPGAs are susceptible to electronic particles which can toggle configuration bit values and hence change the correct function of the design. Moreover, that could be important in critical applications which require safety and security. Hence using FPGA requires to integrate fault-tolerance schemes into the system. The reliable MPSoC system called Re2DA, presented in this paper, guarantee the system operation by the use of dynamic reconfiguration. Nearly no hardware overhead is required to perform fault-tolerant feature in the system while timing overhead is kept relatively low.

Published in:

Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2011 6th International Workshop on

Date of Conference:

20-22 June 2011

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