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A high-level modeling framework for the design and optimization of complex CT functions

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2 Author(s)
Philippe Benabes ; Department of Signal Processing and Electronic Systems, SUPELEC, 91192 GIF-SUR-YVETTE, France ; Catalin-Adrian Tugui

Novel CMOS technologies are rapidly migrating towards the nanometer world. The design and optimization of complex analog circuits employing these processes is impracticable when using only transistor-level electronic design automation (EDA) tools. Efficient design methodologies including behavioral modeling are inevitable, but the high-level models should incorporate accurate circuit characteristics and technological limitations. One solution consists in using a refined top-down design process where the macro-models are extracted from the analog block elements (e.g. amplifiers, filters) implemented on specific technologies. These fast-simulating models can be used for the high-level simulation and optimization of the entire system. We propose in this paper a complete design methodology employing the above elements and the corresponding application framework based on the interface between MATLAB and CADENCE software tools. SIMULINK and VHDL-AMS are used for the high-level system modeling. A continuous-time (CT) Sigma-Delta modulator application is presented.

Published in:

New Circuits and Systems Conference (NEWCAS), 2011 IEEE 9th International

Date of Conference:

26-29 June 2011