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On-chip antennas are demanded to further lower the cost of wireless CMOS ICs. The low resistivity of silicon substrates is a major obstacle to fabricate high-gain on-chip antennas. We placed an artificial dielectric layer (ADL) between an antenna and Si substrate to improve the antenna gain. A half-wave dipole-antenna that has ADL was designed and fabricated using a CMOS-compatible process with one poly-Si and two metal layers. Using the ADL enhanced gain by 3-dB. The measured gain was the highest ever achieved for the antennas operating at around 10 GHz on low-resistivity Si substrates. A method for further improvement is discussed.