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Improved synthesis of gain-boosted regulated-cascode CMOS stages using symbolic analysis and gm/ID methodology

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5 Author(s)
Flandre, D. ; Lab. de Microelectron., Univ. Catholique de Louvain, Belgium ; Viviani, A. ; Eggermont, J.-P. ; Gentinne, B.
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A systematic study of the gain-boosted regulated-cascode operational transconductance amplifier (OTA) CMOS stage is presented. Symbolic analysis is used first to describe the pole-zero behaviour and second to propose design criteria for optimal settling time. A synthesis procedure based on the “gm/ID” methodology is considered further on for quick optimization of the architecture based on the dc open-loop gain, transition frequency, and settling time specifications. Practical design cases are finally discussed

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:32 ,  Issue: 7 )

Date of Publication:

Jul 1997

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