This paper describes techniques for the design of high-resolution oversampling analog-to-digital converters based on current memories. A key point is the reduction of nonlinearities, in particular those introduced by the current switches. A current-memory cell with very high precision and linearity has been designed and used in an experimental third-order Σ-δ modulator in a 0.8-μm digital CMOS process. A linearity of better than 14 b and a maximum signal-to-noise+distortion ratio (SNDR) of 80 dB has been measured for an oversampling ratio (OSR) of 64
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:32
,
Issue:
7
)
Date of Publication: Jul 1997