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Interfacial-Layer-Driven Dielectric Degradation and Breakdown of HfSiON/SiON Gate Dielectric nMOSFETs

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8 Author(s)
Do-Young Choi ; Dept. of Electr. Eng., Pohang Univ. of Sci. & Technol., Pohang, South Korea ; Kyong Taek Lee ; Chang-Ki Baek ; Chang Woo Sohn
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This letter describes the dielectric degradation and breakdown characteristics of HfSiON/SiON gate dielectric nMOSFETs using the stress-induced leakage current (SILC) analysis. The nMOSFETs show progressive breakdown (PBD) under substrate injection stress, and its characteristic changes as the stress voltage increases, from slow PBD (s-PBD) only, then to a combination of s-PBD and fast PBD (f-PBD), and finally to f-PBD only. It is found that the SILC of nMOSFETs is caused by trap-assisted tunneling mainly through the preexisting deep traps of the high- k layer and the stress-induced traps of the interfacial layer (IL). The stress-induced defects under substrate injection stress are generated within the IL rather than the high- k layer, and the time-dependent dielectric breakdown of the nMOSFETs is driven by the degradation of the IL.

Published in:

Electron Device Letters, IEEE  (Volume:32 ,  Issue: 10 )

Date of Publication:

Oct. 2011

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