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Gated-four-probe a-Si:H TFT structure: a new technique to measure the intrinsic performance of a-Si:H TFT

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2 Author(s)
Chen, Chun-ying ; Dept. of Electr. Eng., Michigan Univ., Ann Arbor, MI, USA ; Kanicki, J.

In this letter, a new technique based on gated-four-probe hydrogenated amorphous silicon (a-Si:H) thin-film transistor (TFT) structure is proposed. This new technique allows the determination of the intrinsic performance of a-Si:H TFT without any influence from source/drain series resistances. In this method, two probes within a conventional a-Si:H TFT are used to measure the voltage difference within a channel. By correlating this voltage difference with the drain-source current induced by applied gate bias, the a-Si:H TFT intrinsic performance, such as mobility, threshold voltage, and field-effect conductance activation energy, can be accurately determined without any influence from source/drain series resistances.

Published in:

Electron Device Letters, IEEE  (Volume:18 ,  Issue: 7 )