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Fast Multiple Inverse Transforms With Low-Cost Hardware Sharing Design for Multistandard Video Decoding

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4 Author(s)
Chih-Peng Fan ; Dept. of Electr. Eng., Nat. Chung Hsing Univ., Taichung, Taiwan ; Chia-Hao Fang ; Chia-Wei Chang ; Shun-Ji Hsu

In this brief, fast multiple inverse transform algorithms and their hardware sharing designs for 2 × 2, 4 × 4, and 8 × 8 inverse transforms in H.264/Advanced Video Coding and the 8 × 8 inverse transform in Audio Video Coding Standard, 4 × 4 and 8 × 8 inverse transforms in VC-1, and inverse discrete cosine transform in JPEG and MPEG-1/2/4 are developed with a low hardware cost, for multistandard decoding applications. By matrix factorizations and shift-and-addition computations, the proposed 1-D hardware sharing transform scheme is achieved without multiplications. The hardware cost of the proposed 1-D sharing architecture is smaller than that of the individual and separate designs. Through VLSI implementations with regular modularity, the 2-D transform with the proposed 1-D sharing architecture achieves multistandard real-time video decoding.

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Circuits and Systems II: Express Briefs, IEEE Transactions on  (Volume:58 ,  Issue: 8 )