Cart (Loading....) | Create Account
Close category search window

Evolvable systems on reconfigurable architecture via self-aware adaptive applications

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Sironi, F. ; Dipt. di Elettron. e Inf., Politec. di Milano, Milan, Italy ; Cuoccio, A. ; Hoffmann, H. ; Maggio, M.
more authors

Self-adaptive applications are capable of changing their behavior thousands of times per second to autonomically find a way to accomplish given goals despite working in an unpredictable environment whose conditions can vary continuously. In this work we propose an evolvable system that runs self-adaptive applications on top of a heterogeneous system consisting of a general purpose processor and a reconfigurable device. Self-adaptive techniques enable an effective runtime exploration of a rich design space at the intersection of hardware and software and prove how their adoption can improve applications' ability to meet given performance goals. The operating system running on top of the heterogeneous system is responsible for providing self-adaptive capabilities. It answers applications' requests for functionality by choosing at runtime the best suiting implementation with respect to the given constraints and the environment. We designed and developed an evolvable system exploiting self-adaptive techniques by running a customized version of GNU/Linux and a set of self-adaptive applications on top of a heterogeneous system featuring a multi-core processor, i.e., an Intel Core i7, and a reconfigurable device, i.e., a Xilinx Virtex-5 FPGA-based board.

Published in:

Adaptive Hardware and Systems (AHS), 2011 NASA/ESA Conference on

Date of Conference:

6-9 June 2011

Need Help?

IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.