Skip to Main Content
A capacitively coupled probing circuit with a novel de-skewer, a low-pass filter and a high-sensitivity receiver is proposed to realize a membrane-based wafer-level simultaneous testing robustly. The de-skewer can be designed by only digital core transistors and has stable feed-forward architecture. The receiver with the low-pass filter can suppress the undesirable ringing caused by the complex wiring structure in the probe card. A probe chip and a 300 mm DUT-wafer are fabricated in a 1.2 V 90 nm technology and the measured power consumption of RX core is 0.5 mW at 1 Gbps operation. The BER is improved below 10-12 over almost all UI range when the de-skewing function is turned on.