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Automated GmC filter design: A case study in accelerated reuse of analog circuit design

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5 Author(s)
Sankalp Modi ; Dept. of Electrical Engineering, University of Texas at Dallas ; Syed Askari ; Sujan Manohar ; Poras Balsara
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The increasing complexity of analog design for SoCs has become a bottleneck due to the lack of established design automation flows. Consequently, reuse of analog design IP (intellectual property) is becoming increasingly prevalent in the semiconductor industry. Traditional design reuse approaches still require a considerable amount of a designer's time for a new set of specifications or migration to new technology nodes. This paper describes an accelerated design reuse strategy for analog circuit design using design automation techniques. As a case study, we developed an automated GmC filter design flow using a combination of heuristic and stochastic optimization methods. The resultant IP is capable of generating SPICE netlists for wide sets of specifications and different technology nodes with minimal designer effort.

Published in:

Circuits and Systems Workshop (DCAS), 2010 IEEE Dallas

Date of Conference:

17-18 Oct. 2010