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ODETTE: A non-scan design-for-test methodology for Trojan detection in ICs

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2 Author(s)
Banga, M. ; Bradley Dept. of Electr. & Comput. Eng., Virginia Tech, Blacksburg, VA, USA ; Hsiao, M.S.

In this paper, we propose a two-step non-scan design-for-test methodology that can ease detection of an embedded Trojan and simultaneously partially obfuscates a design against Trojan implantations. In the first step, we use Q signals of flip-flops in a circuit to increase the number of reachable states. In the second step, we partition these flip-flops into different groups enhancing the state-space variation. Creation of these new reachable states helps to trigger and propagate the Trojan effect more easily. Experimental results on ISCAS'89 benchmarks show that this method can effectively uncover Trojans which are otherwise very difficult to detect in the normal functional mode. In addition, partitioning the flip-flops of the circuit into different groups and selecting the output (Q or Q) based on input controlled ENABLE signals conceal its actual functionality beyond simple recognition thereby making it difficult for the adversary to implant Trojans.

Published in:

Hardware-Oriented Security and Trust (HOST), 2011 IEEE International Symposium on

Date of Conference:

5-6 June 2011