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A low-power multiplying digital-to-analog conversion (MDAC) circuit realization using a current-charge-pump (CCP) residue amplifier is presented. It takes advantage of the improved timing resolution in advanced CMOS technologies by transforming the voltage signal into an equivalent time-domain representation. The proposed CCP MDAC only uses switches, current sources, capacitors, and a comparator. It occupies a small area and achieves high power efficiency by eliminating operational transconductance amplifiers for the interstage amplification and by avoiding power-hungry buffers for the reference voltages. The CCP amplifier principle is demonstrated in a 1-V 100-MS/s 8-bit CCP pipelined analog-to-digital conversion proof-of-concept prototype in a 90-nm CMOS.